GANDHI ENGINEERING COLLEGE, BHUBANESWAR
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
SUBJECT – DIGITAL ELECTRONICS CIRCUIT
QUESTION BANK
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SECTION – A(Multiple Choice Questions, Each Question carries 1 mark)
SEM – 4th BRANCH - ELECTRICAL
1.(a) State True or False: The output of a logic gate is 1 when all its inputs are at logic 0. The logic gate is either a NOR or an EX-NOR.
(b) State True or False: Excess – 3 is a reflective code.
(c) Pick the correct choice: 1+A+AB+ABC+ABCD+................. = ?
(i) A (ii) A+B (iii) A+B+C (iv) 1
(d) A multiplexer is also known as a
(i) Data selector (ii) Data distributor (iii) Serial to Parallel converter (iv) None
(e) The Hexa-decimal equivalent of binary number 110110 is
(i) 54 (ii) 63 (iii) 36 (iv) None of these
(f) The dual of x +x' = 1 is
(i) x.x'= 0 (ii) x +x' = 0 (iii) x.x'= 1 (iv) None
(g) The complement of the Boolean function F = A C + ABC + is
(i) (A C) . (ABC ).() (ii) (A'+B+C').(++).(A+B+C)
(iii) A C + ABC + (iv) None
(h) A De-multiplexer is also known as a
(1) Data selector (2) Data distributor (3) Parallel to Serial converter (4) None
(i) A two level AND-OR circuit is equivalent to a two level
(1) AND-NOR (2) NAND-OR (3) NAND-NAND (4) NOR-NOR
(j) The expression of min-terms for the sum of the full-adder ckt is ___________________ .
(k) State True or False: Ex-NOR gate is also known as comparator gate.
(l) The 2's complement representation of (-24) is ___________________ .
(m) The Gray code of binary 1100111 is ____________ .
(n) State True or False: Decoder is a sequential circuit.
(o) A Flip-Flop is capable of storing ___ bit.
(p) The number of NAND gates necessary to design a D-Latch is
(a) 2 (b) 3 (c) 4 (d) 5
(q) The number of NAND gates necessary to design Y = AB + CD is
(a) 2 (b) 3 (c) 4 (d) 5
(r) The Octet in a K-map is capable of reducing _____ variables.
(s) The max-terms of the Boolean function F = A + BC is ___________.
(t) The dual of Distributive Law is ____________ .
(u) The invert-OR gate is also known as
(a) NAND gate (b) NOR gate (c) OR gate (d) AND gate
(v) The Octal equivalent of Hexa-decimal number (AC8) is _________ .
(w) To design a 2-bit by 2-bit multiplier ckt, the number of AND gates required is
(a) 2 (b) 3 (c) 4 (d) 5
(x) The AND-invert gate is also known as
(a) NOT gate (b) NOR gate (c) NAND gate (d) AND gate
(y) How many number of full-adder circuits are necessary to design a 6-bit parallel Adder circuit.
(a) 3 (b) 4 (c) 5 (d) None
SECTION – B(Short Questions, Each Question carries 2 marks)
2.(a) Given X = 1011101 and Y = 1100011. Perform X-Y using 2's complement method.
(b) How many Boolean functions can be implemented using with 4-input variables ?
(c) Express the following function in sum of min-terms.
x+ z + (+ y) +
(d) Prove that AB + C + BC = AB + C
(e) Suppose that we want to represent the decimal fraction 0.6 in binary using a 4-bit word. Then
(i) Find the binary fraction that gives the closest value.
(ii) Repeat the problem for 8-bit binary word size.
(f) Consider the function f (A,B,C) = (2,3,4,6.7) . Derive the canonical sum-of-product for the function using min-terms.
(g) Suppose that you need a 3:1 MUX in your system. Discuss how you can implement this using two 2:1 MUXs and what problem might arise in this application.
(h) What is the binary equivalent of in sign and 2's complement method ?
(i) State and Prove De-Morgan's theorem.
(j) Simplify the following Boolean Expression.
F = B + A+ AB + A
(k) Convert the equation F = AC + (+ C) into its Product of max-terms.
(l) Construct the truth table of the following:
G(x,y,z) = x XOR y XOR z
(m) Under what condition the output of a two input EX-OR gate remain always at logic ZERO level ? Justify with logical expression/diagram.
(n) Realize a combinational circuit which produces output 1 when there is even number of ones in the input.
(o) Prove that the dual of EX-OR gate is equal to its complement.
(p) Add two number (7,-13) using 2's complement notation.
(q) Draw the EX-NOR gate using NAND gates.
(r) How does a half adder differ from full-adder ?
(s) Distinguish between combinational and sequential circuits with proper examples.
(t) Differentiate the decoder from multiplexer.
(u) State the difference between Encoder and Multiplexer.
(v) Differentiate between positive logic and negative logic.
(w) Write down the outputs of half-subtractor with truth table.
(x) Determine the base of the number for the following operation to be correct.
24 +17 = 40
(y) Using 10's complement, subtract 72532 – 3250.
(z) Prove the Distributive property of Boolean Algebra.
m right ans
ABOVE QUESTION NO 2(K) IS THE QUESTION ACCORDING TO THE QUESTION BANK
SECTION – C(Long Quetions, Each Question carries 10 marks)
3. Twelve months of a calendar are represented by a 4-bit binary representation, where 0010 represents January, 0011 represents February and so on. Design a switching circuit which will light up a LED when fed with the 4 bit input pattern corresponding to a month having 31 days. Use minimum number of NAND gates.
4.(a) Simplify the following Boolean function using a four variable K-map.
F(A,B,C,D) = (0,1,3,4,5,7,9,11)
And then, realize the simplified function using logic gates.
(b) Minimize the following Boolean Function F, together with the don't care conditions d.
F(A,B,C,D) = (1,3,5,7,9,15)
d(A,B,C,D) = (4,6,12,13)
5.(a) Design a 2-bit by 2-bit Binary Multiplier circuit.
(b) Design a combinational circuit that compares two 4-bit numbers to check if they are equal or not.
6.(a) Draw the logic diagram of a 2-to-4 line decoder using NOR gates only. Include an enable input.
(b) Implement a Full-adder with two 4:1 MUX.
7.(a) Design a full-adder by using Decoder.
(b) Simplify the following function and implement them with two-level NOR gate circuits.
8. Simplify the following Boolean expressions in Sum of products and Product of sums.
F(w,x,y,z) = (0,2,5,6,7,8,10)
F(A,B,C,D) = (1,3,5,7,13,15)
9.(a) Construct a 16:1 MUX with two 8:1 MUX's.
(b) What do you mean by Three-state logic ? What is its importance in combinational circuit ?
10.(a) Design a logic circuit that will allow a signal A to pass to the output only when the control inputs B and C are both HIGH, otherwise the output will stay LOW.
(b) What is a Priority Encoder ? What is its importance ?
11. For the given function, find the SOP and POS in two different K-Map and implement using basic logic gates (Assume that complement literals are available).
F = (1,3,5,7,9,15) + d (4,6,12,13)
12. Design a 4-bit magnitude comparator circuit.
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